When using totem pole output circuit configurations (sometimes called push-pull outputs) as illustrated in prior art circuit 99 of FIG. 1, one often encounters a phenomena called "shoot-through." Because two transistors are driven in unison, them is a short period of time during which both transistors are conducting simultaneously. As is shown in FIG. 1a, as the gate voltage drops from Vcc to ground, M1 gradually turns on as M2 is gradually turning off. During the time when the gate voltage is at an intermediate level, a pulse of current passes from supply Vcc through M1 and M2 to circuit ground. This pulse of current is known as "shoot-through" or "through current."
Because transistors in totem pole output configurations are designed for minimum on resistance, "through currents" can exceed the working current levels in a circuit. For example, a 1A totem pole circuit could see "through currents" of 5A. Although "shoot through" pulses are narrow, substantial efficiency losses may result if the currents are substantially large. Losses in efficiency are unacceptable in micro-power applications. In addition, the lost power is dissipated in the output transistors and requires larger heat sinks which are costly in applications that require space-efficient packaging.
In addition to lost efficiency, "through currents" may cause premature device failures which cause reliability problems. "Through currents" also produce substantial noise which may result in erratic circuit operation and undesired RFI/EMI (radio frequency interference/electromagnetic interference) problems.
There are several prior art approaches to controlling through currents. One prior art solution uses external resistive limiting. Unfortunately, this solution only reduces, but does not eliminate "through currents." A resistor is a lossy element and thus adds dissipation losses of its own, thus reducing efficiency.
Another prior art solution to "through currents" involves inductive snubbing, which eliminates the "through currents." However, the inductive elements reduce the circuit's performance and require extra external components which are undesirable.
Yet another prior art solution uses non-overlapping timing signals. In this solution each of the transistors in the totem pole output are driven with a different signal, created by a non-overlapping clock generator as illustrated in prior art FIG. 2. This is often called a "break-before-make" configuration because one transistor is assured to be non-conducting before the other transistor begins conduction. The problems with this solution is that "dead time" introduced by the non-overlapping clock generator diminishes the circuit's performance. Additionally, the "dead time" must be made long enough to operate without "through currents" under worst case process conditions. Such guardbanding reduces circuit performance.
Still another prior art solution utilizes the concept of non-overlapping timing signals in adaptive "dead time" controllers. These circuits compute the duration of "dead time" by monitoring the voltage waveforms so that only the minimal "dead time" necessary is inserted to prevent "through currents" from occurring. The solution has been to use a comparator circuit to detect voltage levels of the driving transistor as shown in prior art FIG. 3, but this solution requires DC quiescent current. DC quiescent current, even at low levels, is unacceptable for many applications such as portable applications requiring battery operated equipment or any other micro-power application.
It is an object of this invention to provide a "break-before-make" adaptive "dead time" output control circuit that is independent of output loading and requires no DC quiescent current and no external components. Other objects and advantages of the invention will become apparent to those of ordinary skill in the art having reference to the following specification together with the drawings herein.